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| CXP82900 CMOS 8-bit Single Chip Microcomputer Description The CXP82900 is a CMOS 8-bit single chip microcomputer of piggyback/evaluator combined type, which is developed for evaluating the function of the CXP82940/82948/82952/82960. Piggyback/ evaluator type 80 pin PQFP (Ceramic) Features * Wide-range instruction system (213 instructions) to cover various types of data -- 16-bit operation/multiplication and division/ Boolean bit operation instructions * Minimum instruction cycle 250ns at 16MHz operation 122s at 32kHz operation * Applicable EPROM LCC type 27C512 (Maximum 60K bytes are available.) * Incorporated RAM capacity 2048 bytes (Including fluorescent display data area.) * Peripheral functions -- A/D converter 8-bit, 8-channel, successive approximation method (Conversion time of 20s/16MHz) -- Serial interface Incorporated buffer RAM (Auto transfer for 1 to 32bytes), 1 channel Incorporated 8-bit, 8-stage FIFO (Auto transfer for 1 to 8 bytes), 1 channel -- Timer 8-bit timer 8-bit timer/counter 19-bit time base timer 32kHz timer/counter -- Fluorescent display panel controller/driver Maximum 196-segment display possible 1 to 16-digit dynamic display Dimmer function High voltage drive output (40V) Pull-down function Hardware key scan function (Maximum 12 x 8 key matrix compatible) 2C bus interface --I -- Remote control transmission circuit Auto transmission for 1 to 32 bytes, restart function, carrier output function -- Remote control reception circuit 8-bit pulse measurement counter with on-chip 6-stage FIFO * Interruption 16 factors, 15 vectors, multi-interruption possible * Standby mode SLEEP/STOP * Package 80-pin ceramic QFP Note) Mask option depends on the type of the CXP82900. Refer to the Products List for details. Structure Silicon gate CMOS IC Perchase of Sony's I2C components conveys a licence under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specifications as defined by Philips. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. -1- E95613-PP CXP82900 Pin Configuration in Piggyback Mode PE0/EC/INT0 PG3 PG2 PG1 PG0 TEX NC TX VDD 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 PE1/INT1 PE2/INT2 PE3/INT3/NMI PE4/RMC PE5 PE6/RMCO PE7/TO/ADJ PB0 PB1/CS0 PB2/SCK0 PB3/SI0 PB4/SO0 PB5/SCK1 PB6/SI1 PB7/SO1 PA0/AN0 PA1/AN1 PA2/AN2 PA3/AN3 PA4/AN4 PA5/AN5 PA6/AN6 PA7/AN7 AVDD 1 2 3 4 5 64 63 62 61 60 T7 T8/S19 T9/S18 T10/S17 T11/S16 T12/S15 T13/S14 T14/S13 T15/S12 S11 S10 S9 S8 PD7/S7 PD6/S6 PD5/S5 PD4/S4 PD3/S3 PD2/S2 PD1/S1 PD0/S0 VFDP PC7/KR7 PC6/KR6 T0 A12 A15 6 7 8 9 10 11 12 13 14 15 16 17 18 19 A6 A5 A4 A3 A2 A1 A0 NC D0 5 6 7 8 9 10 11 12 13 A7 NC A14 VDD A13 T1 T2 T3 T4 T5 T6 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 4 3 2 1 32 31 30 29 28 27 26 25 24 23 22 21 A8 A9 A11 NC OE A10 CE D7 D6 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 GND NC D1 D2 D3 D4 D5 20 Note) NC (Pin 75) is always connected to VDD. PF2/SDA0 PF3/SDA1 PF0/SCL0 PF1/SCL1 -2- PC0/KR0 PC1/KR1 PC2/KR2 PC3/KR3 PC4/KR4 PC5/KR5 EXTAL AVREF XTAL AVSS RST VSS CXP82900 Pin Configuration in Evaluator Mode PE0/EC/INT0 PG3 PG2 PG1 PG0 TEX NC TX VDD 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 PE1/INT1 PE2/INT2 PE3/INT3/NMI PE4/RMC PE5 PE6/RMCO PE7/TO/ADJ PB0 PB1/CS0 PB2/SCK0 PB3/SI0 PB4/SO0 PB5/SCK1 PB6/SI1 PB7/SO1 PA0/AN0 PA1/AN1 PA2/AN2 PA3/AN3 PA4/AN4 PA5/AN5 PA6/AN6 PA7/AN7 AVDD 1 2 3 4 64 63 62 61 T7 T8/S19 T9/S18 T10/S17 T11/S16 T12/S15 T13/S14 T14/S13 T15/S12 S11 S10 S9 S8 PD7/S7 PD6/S6 PD5/S5 PD4/S4 PD3/S3 PD2/S2 PD1/S1 PD0/S0 VFDP PC7/KR7 PC6/KR6 A7/D7 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 A6/D6 A5/D5 A4/D4 A3/D3 A2/D2 A1/D1 A0/D0 NC RD 5 6 7 8 9 10 11 12 13 T0 T1 T2 T3 T4 T5 T6 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 A12 A15 NC 4 3 2 1 32 31 30 29 28 27 26 25 24 23 22 21 A8 A9 A11 NC HALT A10 E/P I/T MON 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 SYNC GND RST WR NC C2 C1 20 VDD A14 A13 Note) NC (Pin 75) is always connected to VDD. PF2/SDA0 PF3/SDA1 PF0/SCL0 PF1/SCL1 -3- PC0/KR0 PC1/KR1 PC2/KR2 PC3/KR3 PC4/KR4 PC5/KR5 EXTAL AVREF XTAL AVSS RST VSS CXP82900 EPROM Read Timing (Ta = -20 to +75C, Vcc = 4.5 to 5.5V, Vss = 0V reference) Item Address Data Input delay time Address Data Hold time Symbol Pins A0 to A15 D0 to D7 A0 to A15 D0 to D7 0 Min. Max. 75 Unit ns ns tACC tIH 0.8VDD A0 to A15 Address data 0.2VDD tACC tIH 0.8VDD Input data 0.2VDD D0 to D7 Products List Products Option item Mask type CXP82940 CXP82948 CXP82952 CXP82960 Package ROM capacitance Pull-up resistance for reset pin Pull-down resistance for high voltage drive pin 80-pin plastic QFP 40K bytes 48K bytes 52K bytes 60K bytes Existent/Non-existent Existent/Non-existent Piggyback/evaluator product CXP82900-U01Q 80-pin ceramic QFP EPROM 60K bytes Existent Existent: T0 to T7, S8 to T8/S19 Non-existent: PD0/S0 to PD7/S7 -4- CXP82900 Piggyback mode/evaluator mode can be switched as shown below. Piggyback mode Piggyback/evaluator product Evaluator mode Pin 1 marking LCC type EPROM Pin 1 marking Pin 1 index Note) CPU Probe Note) Evaluation cap should be connected to CPU probe. Package Outline Unit: mm 80PIN PQFP (CERAMIC) PIN No. 1 INDEX INDEX 80 18.7 16.3 0.2 65 80 PIN No. 1 INDEX 65 1 64 64 1 4.5 1.27 0.13 22.3 0.25 18.12 0.2 12.02 14.22 24.7 6.0 0.3 1.0 0.7 24 41 41 24 1.3 0.3 25 9.48 11.66 15.58 0.2 40 40 0.6 25 PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE PQFP-80C-L01 AQFP080-C-0000-A LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT CERAMIC GOLD PLATING 42 ALLOY 5.7g 3.57 0.36 + 0.05 0.15 - 0.02 9.59 MAX -5- 0.4 0.08 0.8 0.05 |
Price & Availability of CXP82900
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